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MixSignal Design's silicon-proven SerDes PHYs cover a wide range of protocols from 1 to 14 Gbps, providing our customers access to PHYs which offer optimized power/performance at advanced process nodes and various foundries. Supported protocols include SATA, SAS, PCIE, XAUI, RXAUI 10GBASE-KX4, 10GBase-KR, SGMII, SF14.2, SF15.1, HRIF and PCI Express.
MixSignal Design, LLC is founded at 2002. Previous to that, MixSignal Design partners have been working in various semiconductor companies or as independent consulting engineers.
MixSignal Design Engineers have extensive background in mixed-signal IC design and development, with track record in high frequency transceivers, SerDes, PLLs,and DLLs design.
Our mission is to provide our customers and partners with reliable mixed-signal designs on time and at a reasonable cost.
Our track record of delivering first time functional silicon and offering outstanding customer support at every phase of the project, from product definition, through development and transfer to production, has been the factor of bringing our customers back for multiple times.
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